NVIDIAHR 发表于 2018-5-23 14:20:52

NVIDIA is Hiring Hardware Talents

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·      Senior CPU Architecture Engineer·      Senior NVDLA Architecture Engineer·      Senior ASIC Design Engineer(Security)·      Senior ASIC Design Engineer(Video)·      Senior Verification Engineer·      SOC Design Engineer·      ASIC Design/Verification Engineer·      ASIC Verification Engineer(Clocks)·      Senior Physical CAD Engineer·      ASIC Physical Design Engineer 我需要如何申请呢?如果你对以上职位感兴趣,请发简历至:Olivialiu@careerintlinc.com邮件标题:职位名+姓名+毕业时间+可到岗时间 +招聘信息来源 Senior CPU Architecture Engineer
工作地点:上海 浦东新区 秋月路26号What you'll bedoing
[*]Architect NVIDIA's next   generation of RISCV CPU
[*]Co-work with software team   to identify architecture requirements
[*]Evaluation of different   architecture solutions
[*]Define architecture of the   CPU core and various hardware components surrounding the CPU, like local   memory, interconnect and crypto accelerators
[*]Validate the new   architecture on CMOD
What we need to see
[*]BS/MS in electrical/computer   engineering and related.
[*]3+   years’ experience in hardware architecture
[*]Strong   skills in C/C++
[*]Solid   understanding to computer architecture
Ways to stand out from the crowd
[*]Project experiences of   complex CPU architecture
[*]Knowledge   or project experiences of RISCV CPU
[*]Knowledge   of project experiences on SystemC modeling
[*]Broad   understanding to computer security and crypro algorithms like   AES/SHA/RSA/ECC
[*]Fluent   English (both written and spoken) and excellent communication skills
[*]Demonstrated   ability to work independently as well as in a multi-disciplinary group   environment
Senior NVDLAArchitecture Engineer
工作地点:上海 浦东新区 秋月路26号What you'll bedoing·      Buildingnext generation of NVDLA for both internal usage and open source·      Workon Deep-Learning architecture, algorithms, and software development·      Developfunction/performance/power models for NVDLA·      Co-workwith other HW team to deliver high quality Deep-Learning processors. What we need to see·      MS/Ph.Din electrical/computer engineering and related.·      3+years strong experience in algorithm/architecture development in one or some ofthe following technologies: CPU, GPU, DSP, deep-learning processor, ImageProcessor.·      Solidsoftware skills in C/C++ Ways to stand out from the crowd·      Hardwaredesign or driver development background is a plus.·      FluentEnglish (both written and spoken) and excellent communication skills·      Demonstratedability to work independently as well as in a multi-disciplinary groupenvironment Senior ASIC Design Engineer(Security)
工作地点:上海 浦东新区 秋月路26号What you'll bedoing·      Building NVIDIA's next generationof RISCV security CPU·      Co-work with architect team todefine CPU architecture/micro-architecture·      Design and verification of varioushardware modules including CPU core, interconnect, and various peripherals includingDMA, AES, SHA, RSA and ECC engines What we need tosee
[*]BS/MS in electrical/computer   engineering and related.
[*]3+ years’ experience in ASIC   design. Strong design/implementation skills in Verilog. Solid   understanding in timing/power optimization skills of digital design
Ways to standout from the crowd
[*]Solid understanding to   computer architecture
[*]Project experiences of complex   CPU architecture or micro-architecture design like out-of-order or   dual-issue cores
[*]Knowledge or project   experiences of RISCV CPU
[*]Broad understanding to   computer security and crypro algorithms like AES/SHA/RSA/ECC
[*]Perl scripting skills is   appreciated as a plus.
[*]Fluent English (both written   and spoken) and excellent communication skills
[*]Demonstrated ability to work   independently as well as in a multi-disciplinary group environment
Senior ASIC Design Engineer(Video)
工作地点:上海 浦东新区 秋月路26号What you'll bedoing·      Building NVIDIA's next generationof video codec engines·      Co-work with video architect todefine video architecture/micro-architecture·      Design and verification of videohardware module. What we need tosee·      BS/MS in electrical/computerengineering and related.·      3+ years ‘experience inASIC design. Strong design/implementation skills in Verilog. Solidunderstanding in timing/power optimization skills of digital design Ways to standout from the crowd·      Broad knowledge with video andimage processing techniques and with digital video compression standards suchas H.264, H265, VP9 and AV1 is a big plus.·      Knowledge with computer visionalgorithms like optical flow and stereo is a plus.·      Familiar with HLS tool, likeMentor Catapult·      Perl scripting skills isappreciated as a plus.·      Fluent English (both written andspoken) and excellent communication skills·      Demonstrated ability to workindependently as well as in a multi-disciplinary group environment Senior Verification Engineer
工作地点:上海 浦东新区 秋月路26号What you'll be doing
[*]You will participate in the   research of verification methodology to improve automation and   productivity to produce Nvidia’s new high-quality state of the art   products.
[*]Read IAS and design specs to   understand the design requirement and build corresponding testplan. Review   the testplan with arch/design engineers.
[*]You responses to build block/IP   testbench based on UVM methodology.
[*]The responsibilities includes   building test run and regression flow. Triage failures in regression and   help designer root cause the bug.
[*]Work includes Build various   metrics (passing rate, functional coverage, etc) and monitor its health.
[*]Take SOC verification on fullchip   test environment for IPs
[*]Analyse functional/code coverage   result and identify the coverage holes. Work with design engineer to   improve the coverage score.
[*]Deploy the advanced verification   methodology and infrastructure of the SOC/IP
What we need to see
[*]BS / MS in electrical / computer   engineering and related.
[*]3+ years (MS) or 5+ years (BS)   working experience.
[*]Familiar with advance verification   methodology (UVM, VMM, OVM, etc), tools and flow
[*]Fully experienced verification   flow, including testplan, test, coverage model, testbench, BFM modeling.
[*]Deep understanding in Verilog and   HVL (High-level Verification Language)
Ways to stand out from the crowd
[*]Strong programming skills in Perl   and C/C++is plus
[*]Having good arch/design experience   is big plus.
[*]At least good at one of the script   programing lanange : Perl, Shell, Ruby, Python, etc.
[*]Fluent English (both written and   spoken) and excellent communication skills
[*]Proven ability to work   independently as well as in a multi-disciplinary group environment
[*]Strong analytical skills
SOC Design Engineer
工作地点:上海 浦东新区 秋月路26号The NVIDIA System-On-Chip (SOC)group is looking for a top SOC engineer with an interest in RTL integration anddesign as well as verification. The ideal candidate for this position has greatpassion for methodologies and automation solutions that enable creating SOCs inthe least amount of time. In this position, you will havethe opportunity to be responsible for creating complex GPUs and SOCs andinterface directly with unit-level, Physical Design, CAD, Package Design,Software, DFT and other teams. Additionally, you will be involved with definingand creating methodologies that create more efficient and flexible SOCs infuture. What we need tosee1.   BS or MS(preferred) in EE or CS2.   Understandfrontend ASIC design/verification/implementation flow3.   Excellentanalytical and problem-solving skills4.   Strong codingskills in Perl or other industry-standard scripting languages5.   Fluent English(both written and spoken) and excellent communication skills to interface withmany groups and build consensus6.   Good team workspirit, easy to cooperate with team members7.   Prior experiencein implementing System-On-Chip is a plus8.   Prior experiencein RTL build and design automation is a plus ASIC Design/Verification Engineer
工作地点:上海 浦东新区 秋月路26号What you'll bedoing·      Micro-architecture definition forSystem-level modules (Reset, Fuse, Strap, In-silicon measurement, Floorsweep,etc…)·      RTL design, synthesis, timing andsilicon bring-up·      Unit-level and System-levelverification·      Chip level integration What we need tosee·      BS / MS in electrical / computerengineering and related.·      Familiar with verificationmethodology, tools and flow·      Understand frontend ASIC designflow including RTL design, synthesis and timing analysis·      Excellent analytical andproblem-solving skills·      Broad knowledge with Videotechniques, SOC architecture and Computer architecture is a big plus·      Strong programming skills in C/C++and Perl is appreciated as a plus·      Fluent English (both written andspoken) and excellent communication skills·      Good team work spirit, easy tocooperate with team members ASIC Verification Engineer (Clocks)
工作地点:上海 浦东新区 秋月路26号NVIDIA Clock team is now lookingfor ASIC engineers with strong logic design or verification background. In thisposition, you will take part in all stages to design modern complex GPU chipswith state-of-art features and flows. To implement various functions, you willwork directly with different global teams, as ARCH/SW, ASIC Design, CAD,Package, DFT and Physical Design teams. Additionally, you will be involved indefining and creating methodologies that create more efficient and flexibleSOCs in future. What you'll bedoing·      Module-level or Chip-level logicdesign, synthesis, timing constraints, and silicon bring-up.·      Module-level or Chip-levelverification, both for function and test mode·      Methodology or Flow developmentfor above tasks. What we need tosee·      BS / MS in electrical / computerengineering and related.·      Understand ASICdesign/verification/implementation flow·      Familiar with design/verificationlanguages as C/C++, Verilog or VHDL·      Know industrial standard scriptinglanguage as Perl, or Python, TCL, Ruby·      Excellent analytical andproblem-solving skills·      Fluent English and excellentcommunication skills·      Good team work spirit, easy tocooperate with team members·      Understand JTAG, DFT, or OCC is aplus SeniorPhysical CAD Engineer
工作地点:上海 浦东新区 秋月路26号What you'll be doing
[*]Develop   the physical design flow and methodology for all chips in NVIDIA   (including GeForce®/Tegra™/Tesla™/Quadro™).
[*]Work   with EDA vendors on tools evaluation and improvement.
[*]Develop   inhouse tools and solutions.
[*]Support   the global physical design team.
What we need to see
[*]BS/MS   in CS/EE/ME.
[*]Experiences   in one of the following areas: Floorplan, Place&Route, STA, layout   DRC/LVS, DFT, circuit design, RTL.
[*]Strong   programming capabilities.
Ways to stand out from the crowd
[*]Proficiency   in Perl, TCL, Shell.
[*]Experiences   in VLSI design automation or methodology.
[*]Knowledge   on EDA tools: Synopsys (ICC/DC/PT/STAR-RC/Astro/PC/Talus), Cadence (SOCE),   Mentor Graphics (Pinnacle/Olympus) etc.
ASIC Physical Design Engineer
工作地点:上海 浦东新区 秋月路26号We are now looking for an ASIC PD Engineer. What you'll bedoing·      Chip integration and netlistgeneration·      Synthesis·      Netlist quality check·      Formal Verification·      Constraints creation andvalidation, timing budget.·      Co-work with PR engineers toimplement chip partition and floorplan·      Work in conjunction with RRengineers to achieve timing closure for both partition and full chip level·      Achieve special timing closure, suchas io, test, clock etc.·      Function eco creation·      Develop and enhance entire timingclosure flow from frontend (pre-layout) to backend (post-layout)·      Flow automation development·      Methodology in any of above areas.
What we need to see·      BSEE, MSEE is preferred·      Project experience in IC designimplementation·      Courses taken in circuit design,digital design·      Hand-on experience in EDA softwarefrom Synopsys (DC/PT/Formality), Cadence (LEC) is preferred·      Ways to stand out from the crowd:·      Proficient user of Perl or TCL ispreferred·      Excellent English communicationskill
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